Nvidia will discuss how it uses the RISC-V architecture at the RISC-V Summit from October 22 to 24. The GPU maker has used the RISC-V CPU architecture in its GPU microcontrollers for nine years. A 20-minute keynote from Frans Sijstermans, vice president at Nvidia, will be held on October 22 and will reveal additional details.
Staffers from Google, including software engineer Cliff Young, who was a designer of the TPU, will talk about the benefits of RISC-V in AI chips. The TPUs are based on RISC-V architecture.
There may be many more surprises in store. At last year’s RISC-V Summit, Qualcomm declared its long-term commitment to RISC-V amid its legal battle with ARM, and Meta shared more details about how it would use RISC-V designs.
The influence of RISC-V is growing every year as companies look for cheaper and faster ways to design CPUs. The RISC-V open instruction set architecture is free to license and provides customers with the flexibility to include their features in silicon. Customers can top it off with proprietary extensions.
Like Nvidia, Apple also uses RISC-V microcontrollers in its M-series CPUs. At its recent developer summit, Samsung said it ported its TizenOS to RISC-V, which is used in its TVs. Most hardware and cloud providers are supporters of RISC-V.
RISC-V is trying to capture a market of customers exhausted with proprietary options that include x86 and ARM. The x86 is showing signs of life with improved power efficiency and a new alliance between Intel and AMD to protect x86 interests.
Google, Microsoft, and AWS have developed homegrown processors based on ARM.
Research firm Omdia forecasts that RISC-V-based processor shipments could reach 17 billion processors in 2030. About 46% of that number will be chips used in automobiles, the research firm said.
RISC-V International, which manages the architecture development, believes it will reach servers and PCs. But many admit that may take years.
The discussions at the RISC-V Summit will also include AI, GPU, and server specifications updates. RISC-V has poor software support, and some discussions will focus on support for packages and operating systems.
Going into the summit, several issues also cloud RISC-V. Security is on the agenda this year after zero presence last year. There are many sessions on RISC-V security covering confidential computing, cryptographic extensions, and safety modules.
Researchers earlier this year disclosed a RISC-V related hack called “Ghostwrite,” which allows users to bypass protections and access privileged memory in Alibaba’s RISC-V Xuantie C910 chip design. The chip was released many years ago.
Alibaba is a sponsor of this year’s RISC-V Summit. In August, it released R908, a chip for embedded devices with many new safety extensions.
RISC-V has also attracted the attention of U.S. politicians, who are concerned about China’s doubling down on the architecture.
Security researchers are concerned that Chinese companies could ship RISC-V chips into U.S. devices with backdoors that could make them vulnerable. It is hard to patch RISC-V chips as, unlike x86 chips, there are no microcode capabilities.
The political intrigue surrounding RISC-V is not on the agenda.
Some companies have discussed selling RISC-V chiplets, but manufacturing won’t be discussed extensively at the RISC-V Summit.